首页 | 本学科首页   官方微博 | 高级检索  
     检索      

基于FPGA的等精度数字频率计的设计
引用本文:陈景波,丁旭,江维勇.基于FPGA的等精度数字频率计的设计[J].常熟理工学院学报,2011,25(8):90-93,100.
作者姓名:陈景波  丁旭  江维勇
作者单位:常熟理工学院电气与自动化工程学院,江苏常熟,215500
摘    要:根据等精度测量的原理,利用FPGA和Verilog HDL编程设计了一种数字频率计.FPGA程序由分频模块、计数器模块、除法器模块、显示模块组成.经过仿真下载验证,能够实现等精度测频功能,频率测量范围为1Hz-1MHz.与传统方法相比,该方法具有外围电路简单,设计周期短,易于修改等优点.

关 键 词:等精度  FPGA  频率计  Verilog  HDL

The Design of Equal Precision Digital Frequency Meter Based on FPGA
CHEN Jing-bo,DING Xu,JIANG Wei-yong.The Design of Equal Precision Digital Frequency Meter Based on FPGA[J].Journal of Changshu Institute of Technology,2011,25(8):90-93,100.
Authors:CHEN Jing-bo  DING Xu  JIANG Wei-yong
Institution:CHEN Jing-bo,DING Xu,JIANG Wei-yong (School of Electrical and Automation Engineering,Changshu Institute of Technology,Changshu 215500,China)
Abstract:According to the principle of equal precision measurement, a digital frequency meter is designedb ased on FPGA. The program is composed of frequency modules, counter modules, divider module, display module, which are written in Verilog HDL. With the certification of hardware emulation system, the circuit can meett he demand of measurement in the reality and frequency ranges from 1Hz to 1MHz.Compared with traditionalm ethod, this method has the merit of simple peripheral circuit, short design period and easy...
Keywords:equal precision  FPGA  frequency meter  Verilog HDL  
本文献已被 CNKI 维普 万方数据 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号