Low-cost fault tolerance in evolvable multiprocessor systems: a graceful degradation approach |
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Authors: | Shervin Vakili Sied Mehdi Fakhraie Siamak Mohammadi Ali Ahmadi |
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Institution: | (1) School of Electrical and Computer Engineering, University of Tehran, Tehran, 14395-515, Iran |
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Abstract: | The evolvable multiprocessor (EvoMP), as a novel multiprocessor system-on-chip (MPSoC) machine with evolvable task decomposition
and scheduling, claims a major feature of low-cost and efficient fault tolerance. Non-centralized control and adaptive distribution
of the program among the available processors are two major capabilities of this platform, which remarkably help to achieve
an efficient fault tolerance scheme. This letter presents the operational as well as architectural details of this fault tolerance
scheme. In this method, when a processor becomes faulty, it will be eliminated of contribution in program execution in remaining
run-time. This method also utilizes dynamic rescheduling capability of the system to achieve the maximum possible efficiency
after processor reduction. The results confirm the efficiency and remarkable advantages of the proposed approach over common
redundancy based techniques in similar systems.
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Keywords: | Fault tolerance Multiprocessor system-on-chip (MPSoC) Genetic algorithm (GA) Adaptive task scheduling |
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