A power divider based on a new kind of composite right/left-handed transmission line （CRLH TL） unit

A new power divider, composed of a novel composite right/left-handed （CRLH） transmission line （TL） unit, is proposed. The properties of the power divider based on four CRLH TL unit cells are investigated theoretically. By adjusting the parameters of the capacitors and the inductors, the power divider shows perfectly symmetric power division at 5.13 GHz, return loss up to -24 dB, with the transmitted power being close to 3.1 dB. The phenomena are demonstrated by simulation results. Being compact in size and low-cost, the proposed power divider is very suitable for microwave and millimeter wave integrated circuits.     

Modeling and Simulation of Photoelectronic Lambda Bipolar Transistor

Based on the region model of lambda bipolar transistor （ LBT）, a dividing region theory model of PLBT is set up.simulated and verified. Firstly, the principal operations of different kinds of photoelectronic lambda bipolar transistor ,（ PLBT） are characterized by a simple circuit model. Through mathematical analysis of the equivalent circuit, the typical characteristics curve is divided into positive resistance, peak, negative resistance and cutoff regions. Secondly. by analyzing and simulating this model, the ratio of MOSFET width to channel length, threshold voltage and common emitter gain are discovered as the main structure parameters that determine the characteristic curves of PLBT. And peak region width, peak current value, negative resistance value and valley voltage value of PLBT can be changed conveniently according to the actual demands by modifying these parameters. Finally comparisons of the characteristics of the fabricated devices and the simulation results are made, which show that the analytical results are in agreement with the observed devices characteristics.     

Design of S-band circularly polarized double-layer microstrip antenna

This paper proposes a compact polarization microstrip antenna based on double-layer structure.The bandwidth of the whole antenna is widened by expanding the top and bottom layers respectively.After the design of antenna structure and adjustment of size,the proposed antenna can achieve both the left-and right-hand circular polarizations in 2.33 GHz-2.97 GHz.Measurement results indicate that the effective bandwidth is 640 MHz in S-band and the relative bandwidth can achieve 24% with 11 S less than 15 dB.     

A High-Speed Dual Modulus Prescaler Using 0.25μm CMOS Technology

A high-speed dual-modulus divide-by-32/33 prescaler has been developed using 0.25μm CMOS technology. The source-coupled logic (SCL) structure is used to reduce the switching noise and to ameliorate the power-speed tradeoff. The proposed prescaler can operate at high frequency with a low-power consumption. Based on the 2.5 V, 0.25μm CMOS model, simulation results indicate that the maximum input frequency of the prescaler is up to 3.2 GHz. Running at 2.5 V, the circuit consumes only 4.6 mA at an input frequency 2.5 GHz.     

A new type of Wilkinson dual-frequency power divider with symmetrical transmission line stubs

To realize equal power splitting at two arbitrary gigahertz-frequencies, this paper presents a new type of Wilkinson dual frequency power divider, consisting of three-section transmission lines and a series RLC （resistor, inductor and capacitor） circuit. By equating the [ABCD] matrix of the proposed circuit to that of the quarter-wave impedance transformer, coupled with even/odd mode analyses, the design equations of the proposed network are derived. For verification, two dual-frequency power dividers with dual-band operating frequencies at 0.6 GHz and 3.0 GHz, and 3.8 GHz and 10 GHz respectively are designed and simulated. Simulation results show that the dual-band ratio of the proposed power divider can be as large as 5. Comparisons of the simulation results at X-band and S-band with different power dividers indicate that the proposed dual-band power divider performs better under the scenario of the upper operating frequency extending to X-band.     

Fully differential leapfrog implementation for high-pass ladder filters

This paper presents a novel leapfrog signal flow graph （SFG） implementation by fully differential Op amp integrators, which combines low sensitivity, high dynamic range with simple circuit configuration. The direct SFG simulation and leapfrog SFG simulation can yield integrator-based structures likewise, but both of them will lead to higher circuit complexity, noise density and sensitivity. Three Butterworth 5-order high-pass filters with a pass band edge frequency of 1.778 kHz are designed based on different SFGs. From the example, the noise density of the sim- plest leapfrog configuration is approximately 0.4 nV/Hz~/2 lower than those of the other two in the stop band, and shows the best noise density in the pass band. The sensitivity densities of two types of leapfrog filters are approxi- mately equivalent, while that of the direct SFG simulation filter is much higher. However, the pass band response of the simplest configuration is not as good as those of the other two because of two parasitic zeros （at 708 kHz, -31.6 dB and 1.59 MHz, 20.55 dB） and a parasitic pole （at 4.57 MHz, 45.5 dB）.     

High Speed Column-Parallel CDS/ADC Circuit with Nonlinearity Compensation for CMOS Image Sensors

A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.     

A SINGLE-CAVITY MULTIPLE-DEVICE HARMONIC OSCILLATOR AT W-BAND

The equivalent circuit of single-cavity multiple-device fundamentaloscillator(SCMDFO)and that of single-device harmonic oscillator(SDHO)proposed byK.Kurokawa and K.Solbach,respectively,are extended and applied to a single-cavitymultiple-device harmonic oscillator(SCMDHO).By means of describing the functions ofnonlinearity of Gunn diodes,the performances of the SCMDHO are analyzed.It is foundthat the voltage amplitudes are similar to those of SDHO,and the ratio of maximum pow-er of harmonic to that of fundamental is identical to that in SDHO when the devices havesame parameters.The harmonic injection locking behavior is also investigated.The injec-tion locking range is greater than that of SDHO if locking gain remains constant.A2-Gunn diode harmonic oscillator was designed.It delivers 30mW output power at103GHz.The mechanical tuning range is 4.15GHz when the output power remains morethan 10mW.The desired operation mode is stable.     

Inductorless CMOS Low Noise Amplifier for Multiband Application in 0.1–1.2 GHz

A 0.18 μm CMOS low noise amplifier(LNA) by utilizing noise-canceling technique was designed and implemented in this paper. Current-reuse and self-bias techniques were used in the first stage to achieve input matching and reduce power consumption. The core size of the proposed CMOS LNA circuit without inductor was only 128 μm 9226 μm. The measured power gain and noise figure of the proposed LNA were 20.6 and 1.9 dB,respectively. The 3-dB bandwidth covers frequency from 0.1 to 1.2 GHz. When the chip was operated at a supply voltage of 1.8 V, it consumed 25.69 mW. The high performance of the proposed LNA makes it suitable for multistandard low-cost receiver front-ends within the above frequency range.     

Modelling of ultrasonic motor with dead-zone based on Hammerstein model structure

The ultrasonic motor （USM） possesses heavy nonlinearities which vary with driving conditions and load-dependent characteristics such as the dead-zone. In this paper, an identification method for the rotary travelling-wave type ultrasonic motor （RTWUSM） with dead-zone is proposed based on a modified Hammerstein model structure. The driving voltage contributing effect on the nonlinearities of the RTWUSM was transformed to the change of dynamic parameters against the driving voltage. The dead-zone of the RTWUSM is identified based upon the above transformation. Experiment results showed good agreement between the output of the proposed model and actual measured output.     

Comparison of Characteristics of Periodic and Non-Periodic Defected Ground Structures

* A defected ground structure (DGS), realized byetching defects in backside metal ground, is devel-oped froma photonic bandgap (PBG) structure. DGScan change the equivalentcircuitand therefore changethe transformation characteristic of a microstrip line. PBG structure is a kind of artificial crystal, inwhich one dielectric material arranges periodically inanother. This structure can prevent the propagation ofthe electromagnetic wave in a special frequency band.PBG structure has a verybroa…     

新型高品质因数S形缝隙缺陷地结构(英文)

针对传统的缺陷地结构品质因数低、不足以产生尖锐的谐振特性问题, 提出了一种新颖的S形缝隙缺陷地结构.与传统的缺陷地结构相比, 该结构具有更高的品质因数、相对更简单而紧凑的布局和更陡峭的阻带特性. 通过分析其传输特性提取了该结构的等效电路模型, 推导了其结构参数的设计方程, 研究了该结构的传输特性随结构参数变化的规律, 并总结了设计该S形缝隙缺陷地结构的经验方法. 根据此方法设计加工了一个中心频率为4.64 GHz的S形缝隙缺陷地结构样品, 其品质因数高达39.66, 尺寸大小仅为5.00mm×1.40mm, 谐振带陡峭而通带插入损耗小, 测量结果和仿真结果相吻合, 从而验证了该S形缝隙缺陷地在实际工程上的适用性.     

基于一种新的缺陷地结构的低通滤波器的设计

A novel defected ground structure （DGS） for the microstrip line is proposed in this paper. The DGS lattice has more defect parameters so that it can provide better performance than the conventional dumbbell-shaped DGS. Selectivity is improved by 97.2% with a sharpness factor of 24.6%. The method is applied to the design of a low-pass filter to confirm validity of the proposed DGS.     

Science Letters:A power divider based on a new kind of composite right/left-handed transmission line (CRLH TL) unit

INTRODUCTION Wave propagation in a material with negative magnetic permeability and negative electric permit- tivity was first theoretically analyzed by Veselago (1968). In such a left-handed material (LHM), the electric field E, the magnetic field H and the wave vector k of electromagnetic wave propagation obey the left-hand rule (instead of the right-hand rule for usual materials). After Smith et al.(2000) demon- strated simultaneously negative permeability and permittivity, using cop…     

2.5GHz CMOS高速双模前置分频器设计

A high-speed dual-modulus divide-by-32/33 prescaler has been developed using 0.25 μm CMOS technology. The source-coupled logic (SCL) structure is used to reduce the switching noise and to ameliorate the power-speed tradeoff. The proposed prescaler can operate at high frequency with a low-power consumption. Based on the 2.5 V, 0.25 μm CMOS model, simulation results indicate that the maximum input frequency of the prescaler is up to 3. 2 GHz. Running at 2. 5 V, the circuit consumes only 4.6 mA at an input frequency 2.5 GHz.     

基于DGS滤波器的低功率整流天线设计

设计了一种基于缺陷地结构(DGS)滤波器的高效率整流天线,可应用于低功率条件下的无线能量传输系统中。鉴于缝隙耦合微带天线具有较宽的阻带特性和高增益,因而被用于整流天线的接收天线,仿真得到该天线的谐振频率为5.8GHz,增益为8.2d B。整流电路采用DGS直通滤波器,以抑制交流信号传输到负载而被消耗。应用高频仿真软件HFSS对天线和滤波器进行仿真设计,应用ADS射频仿真软件对整流天线系统进行了仿真优化。仿真结果表明,该整流天线在3d Bm输入功率条件下,直流-微波转换效率达到了51.8%。     

双频超宽带微带天线的设计与仿真

提出了一种基于圆形缝隙结构的双频超宽带微带天线.通过在圆形缝隙内加载椭圆形贴片使得天线在获得双频超宽带特性的同时又保持了很小的物理尺寸.仿真结果表明,该天线的-10 dB阻抗带宽分别为2.1~4.0 GHz和5.2~8.8 GHz,天线的相对带宽分别达到了62.3%和51.4%,覆盖了无线局域网(WLAN)的2.45 GHz、5.20 GHz和5.80 GHz三个频段以及宽带互通微波接入(WiMAX)的2.50 GHz和5.25 GHz两个频段.在通带范围内,有良好的辐射特性,并且天线的尺寸为35 mm×35 mm×1 mm,便于集成在电路系统中.     

交指形哑铃带隙结构的小型化带通滤波器设计

设计了一种交指形哑铃带隙结构的带通滤波器,在传统哑铃结构的基础上,把直线臂改进为交指形结构,增加了开路枝节,从而增加等效并联电容,实现了滤波器的小型化。与传统结构相比,新设计的结构尺寸减小了16%,并在阻带增加了2个传输零点,抑制了寄生通带。