CMOS 图像传感器用ADC及其进展

将ADC集成到CMOS 图像传感器可有多种方法,各种方法各有其特点,且对ADC要求不同,而像素级的集成因其诸多优点,正日益引起人们关注.文章对CMOS图像传感器用ADC的研究进展进行了综述.     

10-Bit single-slope ADC with error calibration for TDI CMOS image sensor

A 10-bit single-slope analog-to-digital converter (ADC) for time-delay-integration CMOS image sensor was proposed. A programmable ramp generator was applied to accomplish the error calibration and improve the linearity. The ADC was fabricated in a 180 nm 1P4M CMOS process. Experimental results indicate that the differential nonlinearity and integral nonlinearity were 0.51/-0.53 LSB and 0.63/-0.71 LSB, respectively. The sampling rate of the ADC was 32 kHz.     

Pixel and Column Fixed Pattern Noise Suppression Mechanism in CMOS Image Sensor

Compared with traditional charge coupled device(CCD) imagers, CMOS image sensor (CIS) usingphotodiode to detectphoto signal has the advantages ofhigh photo-sensitivity, reduced blooming, highspeed, integrating signal processing circuit on chip,and lowpower and system cost[1,2]. But fixed patternnoise (FPN) caused by the mismatch in pixels or col-umns circuit severely limits image quality (1 mV—30mV)[3]. FPN is spatial and does not change betweenframes, so it is difficult to be eliminate…