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A fault-tolerant spaceborne mass memory architecture is presented based on entirely commercial-off-theshelf components.The highly modularized and scalable memory kernel supports the hierarchical design and is well suited to redundancy structure.Error correcting code(ECC) and periodical scrubbing are used to deal with bit errors induced by single event upset.For 8-bit wide devices, the parallel Reed Solomon(10, 8) can perform coder/decoder calculations in one clock cycle, achieving a data rate of several Gb/... 相似文献
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Application-specific data processing units (DPUs) are commonly adopted for operational control and data processing in space missions. To overcome the limitations of traditional radiation-hardened or fully commercial design approaches, a reconfigurable-system-on-chip (RSoC) solution based on state-of-the-art FPGA is introduced. The flexibility and reliability of this approach are outlined, and the requirements for an enhanced RSoC design with in- flight reconfigurability for space applications are presented. This design has been demonstrated as an on-board computer prototype, providing an in-flight reconfigurable DPU design approach using integrated hardwired processors. 相似文献
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为了降低接收机功耗,提出一种基于插值的单倍采样接收机架构. 性能分析显示,在具备成形滤波器的情况下,此构架仅以不足0.1dB的损失为代价,将抗干扰计算量降低了一半,从而极大地降低了接收机计算负担和整体功耗. 相似文献
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抗干扰插值迟早门扩频跟踪构架 总被引:1,自引:0,他引:1
为了降低接收机功耗,提出一种基于插值的单倍采样接收机架构. 性能分析显示,在具备成形滤波器的情况下,此构架仅以不足0.1dB的损失为代价,将抗干扰计算量降低了一半,从而极大地降低了接收机计算负担和整体功耗. 相似文献
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