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基于FPGA的宽带信道化数字接收机设计
引用本文:周维,吕幼新. 基于FPGA的宽带信道化数字接收机设计[J]. 中国科技信息, 2011, 0(17): 136-136. DOI: 10.3969/j.issn.1001-8972.2011.17.076
作者姓名:周维  吕幼新
作者单位:电子科技大学电子工程学院,四川成都,611731
摘    要:从减少FPGA资源使用的角度出发,设计一个宽带信道化数字接收机,并对系统中多相滤波及IFFT两大模块的实现进行分析、优化,使FPGA的信号处理能力达到最高效,以解决由于瞬时带宽不断拓宽而带来的设计和实现的困难。

关 键 词:信道化接收机  抽取  多相滤波  IFFT

Design of wideband digital channelize receiver based on FPGA
Zhou Wei Lv Youxin School of Electronic Engineering,University of Electronic Science , Technology,Chengdu ,China. Design of wideband digital channelize receiver based on FPGA[J]. CHINA SCIENCE AND TECHNOLOGY INFORMATION, 2011, 0(17): 136-136. DOI: 10.3969/j.issn.1001-8972.2011.17.076
Authors:Zhou Wei Lv Youxin School of Electronic Engineering  University of Electronic Science    Technology  Chengdu   China
Affiliation:Zhou Wei Lv Youxin School of Electronic Engineering,University of Electronic Science and Technology,Chengdu 611731,China
Abstract:In order to reduce the use of FPGA resources,a wideband digital channelize receiver was designed.The implementation of polyphase filtering and IFFT was analyzed and optimized to make the ability of signal processing be most efficient,so that the trouble of design and realization can be solved with the instant bandwidth increasingly widening.
Keywords:channelize receiver  decimation  polyphase filtering  IFFT  
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