| 小规模集成电路异步十一进制加法计数器设计分析 |
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| 引用本文： | 刘树平,吴勇灵,钱莉.小规模集成电路异步十一进制加法计数器设计分析[J].黔南民族师范学院学报,2014(2):101-104. |
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| 作者姓名： | 刘树平 吴勇灵 钱莉 |
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| 作者单位： | 黔南民族师范学院物理与电子科学系,贵州都匀558000 |
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| 摘 要： | 采用小规模集成电路作为电路单元进行异步时序电路设计时,除了需要完成设计同步时序电路所做的各项工作之外,还要遵循挑选时钟信号的原则、求解状态方程的原则.本文通过一个设计实例,讨论、分析了异步时序电路设计的一般规律及其特殊的特点.
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| 关 键 词： | 异步时序电路 触发器 卡若图 状态转换表 自启动 |
Analysis of Small Scale Integrated Circuit of Asynchronous Eleven Decimal Addition Counter Design |
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| Liu Shu - ping,WU Yong - ling,QIAN Li.Analysis of Small Scale Integrated Circuit of Asynchronous Eleven Decimal Addition Counter Design[J].Journal of Qiannan Normal College of Nationalities,2014(2):101-104. |
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| Authors: | Liu Shu - ping WU Yong - ling QIAN Li |
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| Institution: | ( Dep. of Physics and Electronic Science, Qiannan Normal College for Nationalities, Duyun, 558000, Guizhou, China) |
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| Abstract: | Using small scale integrated circuit as the circuit unit for asynchronous sequential circuit design, in addition to the completion of the design of synchronous sequential circuits, it also needs to follow the principle of selecting the clock signal, and the principle of simplifying equation of state. This paper, through a design example, discusses and analyzes the general rules of asynchronous sequential circuit design and its special features. |
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| Keywords: | asynchronous sequential circuit trigger Karnaugh diagram state table self starting |
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