| 脉冲异步时序逻辑电路的分析与设计探讨 |
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| 引用本文： | 黄晓明. 脉冲异步时序逻辑电路的分析与设计探讨[J]. 培训与研究, 2005, 22(5): 47-49 |
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| 作者姓名： | 黄晓明 |
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| 作者单位： | 湖北教育学院物理与电子信息系,武汉430205 |
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| 摘 要： | 本文以数字系统时最常用的计数器作为实例，介绍了如何对脉冲异步时序逻辑电路进行分析和设计。为电子技术人员在数字系统或计算机硬件的研发中提供了一个有序的思路。
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| 关 键 词： | 脉冲异步时序逻辑电路分析 脉冲异步时序逻辑电路设计 运行条件 |
| 文章编号： | 1007-1687(2005)05-0047-03 |
| 收稿时间： | 2005-05-10 |
| 修稿时间： | 2005-05-10 |
The Analysis and Design of the Pulse Asynchronous Time Sequencing Logic Circuit |
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| HUANG Xiao-ming. The Analysis and Design of the Pulse Asynchronous Time Sequencing Logic Circuit[J]. Training and Research-Journal of Hubei College of Education, 2005, 22(5): 47-49 |
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| Authors: | HUANG Xiao-ming |
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| Abstract: | This paper serves the most commonly used counter of digital system as an illustration, and introduces the analysis and design of the pulse asynchronous time sequencing logic circuit and provides the electronics an orderly thought in the research and development of digital system or computer hardware. |
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| Keywords: | the analysis of the pulse asynchronous time sequencing logic circuit the design of the pulse asynchronous time sequencing logic circuit operating condition. |
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