一种新颖的高精度多相时钟发生电路设计

本文设计了一种新颖的单片集成、适用于高速串行通信接口接收端和数据恢复电路的等间距高精度五相时钟发生电路．基于负反馈动态调整原理和数字化的模拟电路设计技术，电路采用TSMC（Taiwan Semiconductor Manufacturing Company Ltd）的CMOS 0．25um工艺设计和后仿真，实验结果表明：时钟发生电路可正确输出五相时钟，周期均为2．08ns（频率480Mbps）；相互间隔0．416ns，抖动为35ps，锁定时间为1．8us，满足高速串行通信接口接收端和数据恢复电路对五相时钟的要求．．

A Novel High-precision Multi-phase Clock-generator Circuit

It was proposed a novel high - precision 480Mbps multi - phase clock - generator circuit according with high - speed serial link. Involved in negative - feedback dynamic adjustment and digital - based analog circuit - design technology, the circuit design of multi - phase clock - generator circuit is based on TSMC 0. 2Sum mixed signal model. The simulation results revealed that： the clock - generator designed in this paper produces five 480Mbps equal - spaced clock signals between one another. Time interval between each other keeps 0. 416ns with jitter of 35ps, lock time of 1.8us, which meet the requirement of high - speed serial link.