断言验证技术在IP核验证中的应用

随着IP核设计的复杂程度不断提高，功能验证越来越受到重视。高效的断言验证技术被广泛应用到IP核验证上来。用Verilog HDL语言实现该技术在USBIP核验证中的应用，它可以帮助在软件开发测试过程中更旱更快地发现并定位出软件中可能存在的错误，断言主要是证明在某个设计中应该为正确或从来不出现的组合属性和时序属性，在设计中是否满足要求。

Application of Technology of Assertion Verification on IP Core Verification

As the design of IP core become increasingly more complex,the functional verification is laid more and more emphasis on.Technology of assertion verification with high efficiency is adopted on IP core verification.This paper begins with an introduction of basic theory of technology of assertion verification and its many advantages.Then it illustrates that this technology are implemented in the verification of USB IP core in Verilog HDL language.