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| Study and Evaluation in CMOS Full Adders | |
| 作者姓名： | 陈国章 陈昊 何丕廉 |
| 作者单位： | DepartmentofComputerScienceandEngineering,TianjinInstituteofTechnology,Tianjin300191,China |
| 基金项目： | SupportedbyNationalNaturalScienceFoundationofChina(No . 694830 0 4 ) . |
| 摘 要： | Low power adder circuits ,SERF,10T-Ⅰ，10T-Ⅱ,10T-Ⅲ and a complementary adder (28T) at physical layout level are evaluated.Simulations based on the extracted adder circuit layouts are run to assess how various circuit setups can impact the speed and power consumption.In addition,impacts of output inveners on the circuit perfomance of modified SERF and 10T adders due to threshold loss problem are also examined.Differences among these adders are addressed and applications of these adders are suggested. |
| 关 键 词： | CMOS 全加法器 28T加法器 电路图 评价 |
Study and Evaluation in CMOS Full Adders |
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| CHEN Guo zhang ,CHEN Hao ,HE Pi lian.Study and Evaluation in CMOS Full Adders[J].Transactions of Tianjin University,2003,9(1):54-57. | |
| Authors: | CHEN Guo zhang CHEN Hao HE Pi lian |
| Institution: | 1. Department of Computer Science and Engineering, Tianjin Institute of Technology,Tianjin 300191,China 2. Department of Computer Science and Information Engineering, Tianjin University of Science and Technology, Tianjin 300222,China 3. School of Electronic Information Engineering, Tianjin University, Tianjin 300072,China |
| Abstract: | Low power adder circuits, SERF, 10T-Ⅰ,10T-Ⅱ,10T-Ⅲ and a complementary adder (28T) at physical layout level are evaluated. Simulations based on the extracted adder circuit layouts are run to assess how various circuit setups can impact the speed and power consumption. In addition, impacts of output inverters on the circuit performance of modified SERF and 10T adders due to threshold loss problem are also examined. Differences among these adders are addressed and applications of these adders are suggested. |
| Keywords: | CMOS full adder 28T adder |
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