| 基于FPGA的心电信号采集系统设计 |
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| 引用本文： | 杨秀增,黄灿胜,盘世准,韦树贡.基于FPGA的心电信号采集系统设计[J].南宁师范高等专科学校学报,2008,25(2):127-128. |
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| 作者姓名： | 杨秀增 黄灿胜 盘世准 韦树贡 |
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| 作者单位： | 南宁师范高等专科学校物理与信息技术系,广西龙州532420 |
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| 摘 要： | 介绍了基于FPGA的心电信号采集系统设计方法，并给出了该系统的ADC0809采样控制器的源Verilog HDL代码。本系统具有控制成本低和控制可靠等优点，因此，有一定的实用价值。
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| 关 键 词： | FPGA 心电数据采集 Verilog HDL |
The Design of ECG Signal Sampling System Based on FPGA |
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| Yang Xiuzheng,Huang Chansheng,Pan Shizhun,Wei Shugong.The Design of ECG Signal Sampling System Based on FPGA[J].Journal of Nanning Junior Teachers College,2008,25(2):127-128. |
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| Authors: | Yang Xiuzheng Huang Chansheng Pan Shizhun Wei Shugong |
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| Institution: | (Dept. of Physics and Information Technology, Nanning Teachers College, Longzhou, Guangxi 532420, China) |
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| Abstract: | The design of ECG signal sampling system based on FPGA and the source Verilog HDL code of ADC0809 sampling controller in the system is introduced. The system has some practical value with its lower cost of control and higher rehability. |
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| Keywords: | FPGA ECG data sampling Verilog HDL |
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