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基于VHDL的组合逻辑电路的探讨
引用本文:黄晓明.基于VHDL的组合逻辑电路的探讨[J].培训与研究,2009,26(8):69-71,86.
作者姓名:黄晓明
作者单位:湖北第二师范学院物理与电子信息学院,武汉,430205 
摘    要:随着EDA技术的发展与应用,引起了电子产品开发的革命性变革。电子工程技术人员利用先进的EDA工具,基于VHDL硬件描述语言,借助FPGA进行系统级数字逻辑电路的设计与实现,越来越广泛地运用在电子工业领域。本文通过应用实例探讨硬件描述语言VHDL的知识要点和学习难点,针对几种典型的组合逻辑电路采用不同的设计方案,并用Max+plusII工具软件完成编译及仿真验证,为电子工程技术人员在数字系统的开发中提供一些参考。

关 键 词:组合逻辑电路  VHDL  Max+plusII

On the Combinatory Logic Circuit Design Based on the HDL
Institution:HUANG Xiao - ming (College of Physics and Electronic Information, Hubei University of Education, Wuhan 430060,China)
Abstract:With the development and application of EDA technology, the electronics have experienced a revolutionary change. The desigh and implement of the mathematical and logical circuits with system class have been developed by the electronic engineers using advanced EDA tools such as VHDL and FPGA. The key points and difficulties of VHDL are explored by applied examples, different schemes of several typical composite and logical circuits compiled and validated by the software Max + plusII are desighed, which can support a reference for the electronic engieers exploiting the mathmatical system.
Keywords:VHDL  Max+plush
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